# Advanced Computer Architectures - lesson 1 #### Cristiana Silvano ###### 7 March 2016 ## Course Informations Download on the course sites the slides in advance ## Course Topic ### Supercomputers The most powerful supercomputer in italy is situated in Cineca institute in Bologna. Actually the most powerful supercomputer in the world is situated in China - __Tianhe-2__ 33.86 PetaFlops on Linpack (benchmark) - __Titan__ 17.59 PetaFlops on Linpack (benchmark) - 80'000 NVIDIA Tesla GPUs ### Exascale Supercomputers - 20 MW projected to 2023 which requires 50GFlops/W For example Tianhe-2 is only 40th in the consumption list The answer to exascale era are Summit and Sierra supercomputers developed in the USA ### The topic of the course will be: ### Studying cpu architecture for supercomputers, desktop/server and embedded/mobile ### example: Apple A6 - Introduced in 2012 for the iPhone 5 - Used Samsung fabrication technology (LoL) ### Apple A9 - ARMv8 dual core CPU and six-core GPU - Competing against Qualcomm Snapdragon 820 and Samsung Exynos 8890 - Manufactured 14nm by Samung and 16nm by TSMC ### Energy Efficiency - This includes squeezing of computer cores in smaller packages - Every two year we can double the number of transistors per size #### We can build multi/may-cores architecture but we cannot switch on all of them together This is the __Dark silicon era__ Power consumption and single thread performance are not excalating as density. ### Pipelining in MIPS Produced nowadays but Imagination technology (same as PowerVR GPU) #### MIPS Architecture - RISC Instuction set - LOAD/STORE Architecture, cannot operate directly on memory (need to load on registers) ``` example from C c = a + b; a -> $s1 b -> $s2 c -> $s3 MIPS assembly lw $s1,A($s6) lw $s2,B($s6) add $s3, $s1, $s2 sw $s3, C($s6) ``` #### Reduced MIPS assembly used: - ALU operations - LOAD/STORE - branch/jump ### ALU instructions __R-format__ |op|rs|rt|rd|shamt|funct| |---|---|---|---|---|---| __I-format__ |op|rs|rt|immediate| |---|---|---|---| |6bit|5bit|5bit|16bits| ### Load/Store instructions __R-format__ |op|rs|rt|rd|shamt|funct| |---|---|---|---|---|---| __I-format__ |op|rs|rt|offset| |---|---|---|---| |6bit|5bit|5bit|16bits|